PCIe 7.0 clock generator features sub-30fs jitter

The PI6CG33A06 provides a stable reference clock for 128.0 GT/s PCIe links, meeting the bandwidth demands of 800G and 1.6T networking and advanced AI accelerators, says Diodes. It supports Intel CK440Q-Lite specifications and is designed for use in existing server clock architectures.

And, as mentioned, it generates precise 25MHz and 100MHz reference clocks and achieves an RMS jitter of less than 30 femtoseconds (fs).

Diodes writes:

“This is well below the PCIe 7.0 specification maximum requirement of 67fs and represents a significant improvement over the 80fs level defined by the CK440Q specification from Intel. This ultra-low jitter provides greater design margins, helping engineers manage signal integrity challenges across complex PCB traces and connectors.”

Note that each of the six outputs includes an individual output enable (OE) pin. This, says Diodes, allows designers to manage power more effectively and control system operation with greater flexibility.

“PCIe 7.0 specification is pushing system performance to new heights, particularly for AI and high-bandwidth datacentre applications,” said Al Yanes, PCI-SIG President and Chairperson. “PCIe clock generators, including Diodes’ PCIe 7.0 clock generator, help streamline system integration to support these advances.”

The PI6CG33A06 is available in a 40-pin, 5mm x 5mm VQFN (ZLF) package. And pricing is from $2.80 in 3,000-piece quantities.

Image: Diodes

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