NVIDIA’s “Vera” CPU Could Make It One of the Biggest CPU Makers This Year

Earlier this year, we learned that NVIDIA began selling its “Vera” CPU generation as a standalone solution, offering hyperscalers and cloud providers a CPU ready for the agentic AI era. It appears that the “Vera” CPU generation could propel NVIDIA to become one of the largest CPU makers, just behind AMD and Intel in their own game. According to the company’s own estimates, NVIDIA is projected to sell about $20 billion worth of “Vera” CPUs, unlocking a $200 billion Total Addressable Market (TAM) with its standalone offerings. As NVIDIA partners with every major hyperscaler to supply “Vera” CPU racks, we are starting to see many deployments across infrastructure providers for their own use cases and offering it to third-party customers. This approach allows NVIDIA to tap into a massive market, potentially propelling it to become one of the largest CPU makers.

For comparison, Intel’s data center group DCAI generated about $5.1 billion in revenue in the first quarter of 2026, while AMD reported $5.8 billion in its Data Center Segment. These figures include a mix of accompanying products, such as AMD’s Instinct MI GPU sales and networking solutions. With rough estimates and assumptions that both companies will report four times the revenue (assuming no growth, just for general comparison), this would yield $20 billion in sales in their respective data center divisions for the year. NVIDIA’s “Vera” CPU is now projected to reach $20 billion on its own, positioning NVIDIA as one of the largest CPU makers this year and potentially on a path to become the largest CPU maker in the world.

As a reminder, the “Vera” CPU is equipped with 88 custom Armv9.2 “Olympus” cores featuring 176 threads through physical resource partitioning. These custom cores support native FP8 processing, enabling some AI workloads to be executed directly on the CPU with a 6×128-bit SVE2 implementation. The chip offers 1.2 TB/s of memory bandwidth and supports up to 1.5 TB of LPDDR5X memory in the SOCAMM2 format. A second-generation Scalable Coherency Fabric provides 3.4 TB/s of bisection bandwidth, connecting the cores across a unified monolithic die and eliminating the latency issues common in chiplet architectures.