Cortex-M33 Micro Handles Multidrop 10BASE-T1S Ethernet

The 240-MHz Cortex-M33 MCX A5 has a few more important features, but the network support is the most significant as it’s one of the first micros with the integrated PHY. Additional circuitry can be added to provide Power over Data Line (PoDL) support. PoDL is different than Power over Ethernet (PoE), but there are a number of similarities.

PoDL is optional and requires additional hardware, but quite a few applications can run off local power. Often a gateway will link the multidrop segment to an Ethernet switch, making it part of a larger IP network.

The MCX A5 includes a security enclave with NXP EdgeLock support. It employs post-quantum cryptography (PQC) that will be required in the future for many of the target applications. The hardware root of trust and secure boot support will maintain a secure system. Secure debugging is supported as well. Tamper and intrusion detection is part of the mix.

The dual-bank, 2 MB of on-chip flash can be augmented by a FlexSPI-based serial memory. The latter includes memory-caching hardware and the interface provides eXecute-in-Place (XIP) support. TSI and FlexIO interfaces feature human-machine interface (HMI) support.

The rest of the peripheral interfaces are common to many NXP microcontrollers: dual 16-bit ADCs, dual DACs, and a built-in temperature sensor and voltage reference (VREF).

Additional communication interfaces include multiple I2C, I3C, SPI, UARTs, and dual CAN FD ports. Timers include a real-time clock (RTC) and a micro-tick timer.

Overall, the MCX A5 family can handle applications from sensors and control systems to motor control and HMI applications tied together via a 10BASE-T2S network.